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Features
■ RoHS compliant*
■ Low capacitance - 1 pF
■ ESD protection >15 kV
■ Protects 4 I/O and 1 VDD line
Applications
■ HDMI 1.3 version
■ PDAs and notebooks
■ Consumer electronics
■ Display port interface
■ USB 2.0 up to 480 Mb/s
CDSOT236-0504C - TVS/Steering Diode Array
General Information
The CDSOT236-0504C device provides ESD, EFT and Surge protection for high speed
data ports meeting IEC 61000-4-2 (ESD), IEC 61000-4-4 (EFT) and IEC 61000-4-5
I/O 4
6
VDD
5
I/O 3
4
(Surge) requirements. The Transient Voltage Suppressor array offers a Working Peak
Reverse Voltage of 5 V and Minimum Breakdown Voltage of 6 V.
The SOT23-6 packaged device will mount directly onto the industry standard SOT23-6
footprint. Bourns ? Chip Diodes are easy to handle with standard pick and place
equipment and their ?at con?guration minimizes roll away.
Thermal Characteristics (@ T A = 25 °C Unless Otherwise Noted)
1
I/O 1
2
GND
3
1/O 2
Parameter
Peak Pulse Current (tp = 8/20 μs)
Storage Temperature
Operating Temperature
Operating Supply Voltage
ESD per IEC 61000-4-2 (Air) (I/O Pins)
ESD per IEC 61000-4-2 (Contact) (I/O Pins)
ESD per IEC 61000-4-2 (Air) (VCC to GND)
ESD per IEC 61000-4-2 (Contact) (VCC to
GND)
DC Voltage at any I/O Pin
Symbol
I PP
T STG
T OPR
VDC
VESD_IO
VESD_VCC
VIO
CDSOT236-0504C
5.5
-55 to +150
-55 to +85
6
15
8
30
30
(GND-0.5) to (VCC+0.5)
Unit
A
oC
oC
V
kV
kV
V
Electrical Characteristics (@ T A = 25 °C Unless Otherwise Noted)
Parameter
Maximum Reverse Standoff Voltage1
Maximum Leakage Current1 @ VRWM
Maximum Channel Leakage Current @ VRWM
Minimum Reverse Breakdown Voltage1
@ IBV = 1 mA
Maximum Forward Voltage4 @ IF = 15 mA
Maximum Clamping Voltage2 @ 5 A 8/20 μs
Typical ESD Clamping Voltage - I/O2
Symbol
V RWM
I L
I CD
VBR
VF
VC
Vclamp_io
CDSOT236-0504C
5.0
2.0
1.0
6.0
1.2
10
14
Unit
V
μA
μA
V
V
V
V
Maximum Channel Input Capacitance2 @
VPIN5 = 5 V, VPIN2 = 0 V, VIN = 2.5 V, f = 1
CIN
1.2
pF
MHz
Maximum Channel to Channel Input
Capacitance3 @ VPIN5 = 5 V, VPIN2 = 0 V,
CCROSS
0.12
pF
VIN = 2.5 V, f = 1 MHz
Maximum Variation of Channel Input
Capacitance @ VPIN5 = 5 V, VPIN2 = 0 V,
Δ CIN
0.05
pF
VIN = 2.5 V, f = 1 MHz (I/O Pin to GND)
NOTES:
1. Pin 5 to Pin 2 (GND)
2. Pin 1,3,4 or 6 to Pin 2 (GND)
3. Between any two of Pins 1,3,4,6
4. Pin 2 (GND) to Pin 5
*RoHS Directive 2002/95/EC Jan. 27, 2003 including annex and RoHS Recast 2011/65/EU June 8, 2011.
Speci?cations are subject to change without notice.
Customers should verify actual device performance in their speci?c applications.
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